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Instruction set architecture
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#	Item
871	Eidgenössische Technische Hochschule Zürich Programming in Systems[removed]) Add to Reading List Source URL: www.cs.inf.ethz.ch Language: English - Date: 2002-01-09 17:01:00 TRAP Register window Computing Electronic engineering Computer architecture Central processing unit Computer engineering Instruction set architectures
872	LE AVAILAB DS1302 Trickle-Charge Timekeeping Chip Add to Reading List Source URL: datasheets.maximintegrated.com Language: English - Date: 2014-02-20 14:00:14 Computer architecture Computing Static random-access memory Serial Peripheral Interface Bus Universal asynchronous receiver/transmitter Instruction set architectures IBM PC compatibles PICAXE TI MSP430 Microcontrollers Computer memory Computer hardware
873	Eidgenössische Technische Hochschule Zürich Programming in Systems[removed]) Add to Reading List Source URL: www.cs.inf.ethz.ch Language: English - Date: 2002-01-14 04:50:02 System call Ring Instruction set TRAP INT Operating system Popek and Goldberg virtualization requirements Computer architecture Interrupts Central processing unit
874	SPARC Assembly Language ! ! ! The SPARC Assembly Language Add to Reading List Source URL: www.cs.inf.ethz.ch Language: English - Date: 2001-11-12 10:05:40 Assembly languages Central processing unit Classes of computers Programming language implementation Instruction set Machine code Complex instruction set computing Instruction pipeline Microarchitecture Computer architecture Computing Computer hardware
875	Eidgenössische Technische Hochschule Zürich Programming in Systems[removed]) Add to Reading List Source URL: www.cs.inf.ethz.ch Language: English - Date: 2001-10-29 11:12:35 Stack machines Classes of computers Central processing unit Minicomputers Reduced instruction set computing Stack Instruction set Computer Calculator Computer architecture Computing Instruction set architectures
876	QuickRec: Prototyping an Intel Architecture Extension for Record and Replay of Multithreaded Programs∗ Gilles Pokam, Klaus Danne, Cristiano Pereira, Rolf Kassa, Tim Kranich, Shiliang Hu, Justin Gottschlich Add to Reading List Source URL: iacoma.cs.uiuc.edu Language: English - Date: 2013-04-25 09:30:17 Computer hardware Computer memory Instruction set architectures Parallel computing CPU cache Kernel Instruction set Thread Chunking Computer architecture Computing Central processing unit
877	Eidgenössische Technische Hochschule Zürich Programming in Systems[removed]) Add to Reading List Source URL: www.cs.inf.ethz.ch Language: English - Date: 2001-11-20 18:17:37 Instruction set architectures Technology Operating system Computer architecture Computer
878	Eidgenössische Technische Hochschule Zürich Programming in Systems[removed]) Add to Reading List Source URL: www.cs.inf.ethz.ch Language: English - Date: 2002-01-06 17:33:52 Computer programming Subroutines Calling convention Register window Stack Instruction set Computer architecture Central processing unit Computing
879	Eidgenössische Technische Hochschule Zürich Simple Pocket Calculator Evaluation of an equation with a four function calculator (a pocket calculator for dummies) Add to Reading List Source URL: www.cs.inf.ethz.ch Language: English - Date: 2001-10-29 11:12:23 Stack machines Classes of computers Central processing unit Minicomputers Reduced instruction set computing Instruction set Stack Computer VAX Computer architecture Computing Instruction set architectures
880	BusinessCompute Good morning or good afternoon, depending on where you are, and welcome to today’s live channel chat on Business Compute Forum. BusinessCompute I’m Peter Krass, the BCF site’s editor. I’ll be your Add to Reading List Source URL: i.crn.com Language: English - Date: 2014-10-01 13:48:35 Computer architecture Computing Intel Hyper-V Instruction set architectures Intel Core Xeon Computer hardware

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